TJA1050 High-Speed CAN Transceiver

The TJA1050 is the interface between the CAN protocol controller and the physical bus. The device provides differential transmit capability to the bus and differential receive capability to the CAN controller. The TJA1050 is the successor to the PCA82C250 high speed CAN transceiver. The most important improvements are: Much lower Electromagnetic Emission (EME) due to optimal matching of the CANH and CANL output signals Improved behavior in case of an unpowered node. The TJA1050 is the interface between the CAN protocol controller and the physical bus. It is primarily intended for high-speed automotive applications using baud rates from 40 baud up to 1 Mbaud. It provides differential transmit capability to the bus and differential receiver capability to the CAN protocol controller. It is fully compatible with the ?ISO 11898? standard. A current-limiting circuit protects the transmitter output stage from damage caused by accidental short-circuit to either positive or negative battery voltage, although power dissipation increases during this fault condition. A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 165 ?C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off-state resets when TXD goes HIGH. The thermal protection circuit is particularly needed when a bus line short-circuits. The CANH and CANL lines are protected from automotive electrical transients (according to ISO 7637) and are also protected from Electro-Static-Discharge (ESD) of up to 4 kV from the human body. Control line S (pin 8) allows two operating modes to be selected; high-speed mode or silent mode. High-speed mode is the normal operating mode and is selected by connecting pin S to the ground. It is the default mode if pin S is unconnected. In the silent mode, the transmitter is disabled. All other IC functions continue to operate. The silent mode is selected by connecting pin S to VCC. A ?TXD Dominant Time-out? timer circuit prevents the bus lines from being driven to a permanent dominant state (blocking all network communication) if TXD is forced permanently LOW by a hardware and/or software application failure. The timer is triggered by a negative edge on TXD. If the duration of the LOW-level on TXD exceeds the internal timer value, the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on TXD.